The NIC assigns the received data buffers to queues that are associated with CPUs. Hash calculation with multiple receive queues For more information, see RSS with a Single Hardware Receive Queue. The NIC calculates the hash value and the miniport driver assigns received packets to queues that are associated with CPUs. There are three possible levels of hardware support for RSS: The following figure illustrates the levels of hardware support for RSS. For more information about NDIS support for MSIs, see NDIS MSI-X. With message signaled interrupt (MSI) support, a NIC can also interrupt the associated CPU.

The values in the indirection table are used to assign the received data to a CPU.įor more detailed information about specifying indirection tables, hash types, and hashing functions, see RSS Configuration. The defined area can be noncontiguous.Ī number of least significant bits (LSBs) of the hash value are used to index an indirection table. The following figure illustrates the RSS mechanism for determining a CPU.Ī NIC uses a hashing function to compute a hash value over a defined area (hash type) within the received network data. The NIC implements a hash function and the resulting hash value provides the means to select a CPU. Also, the RSS design ensures that the processing that is associated with a given connection stays on an assigned CPU.

With RSS, the NIC and miniport driver provide the ability to schedule receive DPCs on other processors. For an overview of non-RSS receive processing, see Non-RSS Receive Processing. Therefore, all of the receive processing that is associated with the interrupt runs on the CPU where the receive interrupt occurs. Without RSS, a typical DPC indicates all received data within the DPC call. To process received data efficiently, a miniport driver's receive interrupt service function schedules a deferred procedure call (DPC). For this reason, RSS does not use hyper-threaded processors. Because hyper-threaded CPUs on the same core processor share the same execution engine, the effect is not the same as having multiple core processors.

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